W78E52BP

Product Summary

The W78E52BP is an 8-bit microcontroller which can accommodate a wider frequency range with low power consumption. The instruction set for the W78E52BP is fully compatible with the standard 8051. The W78E52BP contains an 8K bytes MTP ROM (Multiple-Time Programmable ROM); a 256 bytes RAM; four 8-bit bi-directional and bit-addressable I/O ports; an additional 4-bit I/O port P4; three 16-bit timer/counters; a hardware watchdog timer and a serial port. These peripherals are supported by eight sources two-level interrupt capability. To facilitate programming and verification, the MTP-ROM inside the W78E52BP allows the program memory to be programmed and read electronically. Once the code is confirmed, the user can protect the code for security. The W78E52BP microcontroller has two power reduction modes, idle mode and power-down mode, both of which are software selectable. The idle mode turns off the processor clock but allows for continued peripheral operation. The power-down mode stops the crystal oscillator for minimum power consumption. The external clock can be stopped at any time and in any state without affecting the processor.

Parametrics

W78E52BP absolute maixmum ratings: (1)DC Power Supply VDD-VSS: -0.3 to +7.0 V; (2)Input Voltage VIN: VSS - 0.3 to VDD +0.3 V; (3)Operating Temperature TA: 0 to 70 ℃; (4)Storage Temperature TST: -55 to +150 ℃.

Features

W78E52BP features: (1)Fully static design 8-bit CMOS microcontroller; (2)Wide supply voltage of 4.5V to 5.5V; (3)256 bytes of on-chip scratchpad RAM; (4)8 KB electrically erasable/programmable MTP-ROM; (5)64 KB program memory address space; (6)64 KB data memory address space; (7)Four 8-bit bi-directional ports; (8)One extra 4-bit bit-addressable I/O port, additional INT2/INT3(available on 44-pin PLCC/QFP package); (9)Three 16-bit timer/counters; (10)One full duplex serial port(UART); (11)Watchdog Timer; (12)Eight sources, two-level interrupt capability; (13)EMI reduction mode; (14)Built-in power management; (15)Code protection mechanism.

Diagrams